Podrobnosti návrhu

Číslo:47/2575/CDV - IEC 60749-15 ED3
Komise:IEC/TC 47
Název komise:Semiconductor devices
Návrh uveřejněn:1.07.2019
K připomínkám do:27.08.2019
Oblast zaměření:Polovodiče
Contact email:cermak(at)agentura-cas.cz

This part of IEC 60749 describes a test used to determine whether encapsulated solid state devices used for through-hole mounting can withstand the effects of the temperature to which they are subjected during soldering of their leads by using wave soldering.

In order to establish a standard test procedure for the most reproducible methods, the solder dip method is used because of its more controllable conditions. This procedure determines whether devices are capable of withstanding the soldering temperature encountered in printed wiring board assembly operations, without degrading their electrical characteristics or internal connections.

This test is destructive and may be used for qualification, lot acceptance and as a product monitor.

The heat is conducted through the leads into the device package from solder heat at the reverse side of the board. This procedure does not simulate wave soldering or reflow heat exposure on the same side of the board as the package body.

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